The inventive concept herein relates to a semiconductor package, and more particularly, to a semiconductor package including a semiconductor chip.
In a semiconductor industry, continued demands for increased operational capacities and higher levels of device integration have lead led to smaller and thinner semiconductor chips and miniaturization of electronics contained in semiconductor chips. As a result, various package technologies have been developed to accommodate desired device compactness. One such package technology involves vertically stacking multiple semiconductor chips to implement a package having high-density chip stacking. This technology can reduce a footprint of the device relative to a single semiconductor chip with comparable functionality.
A semiconductor chip generally includes a plurality of pads having various functions and wirings connected to the pads. The wirings connected to the pads extend in a specific direction and may thus be dense at the center of the semiconductor chip. In this case, due to the arrangement of the pads, there may be a lack of space in which the wirings may be disposed. This can be especially problematic when stacking the chip on a substrate or another chip.